1. Field of the Invention
The present invention relates to differential-to-single ended translators and, in particular, to a differential-to-single ended translator that generates an output signal with very small signal distortion.
2. Description of the Related Art
A differential-to-single ended translator is a circuit that converts a pair of differential input signals into a single-ended output signal by amplifying the difference between the pair of differential input signals. FIG. 1 shows a schematic diagram that illustrates a conventional differential-to-single ended translator 10.
As shown in FIG. 1, when the voltage of input signal IN+ is larger than the voltage of input signal IN-, transistor M11 begins to sink a lesser portion of the current output by current source I, while transistor M12 begins to sink a correspondingly greater portion of the current.
The current sunk by transistor M11 is then sunk by transistor M13 which, in turn, is mirrored by transistor M14. As a result, when the voltage of input signal IN+ is greater than the voltage of input signal IN-, the current output by transistor M12 is greater than the current sunk by transistor M14. This difference in current causes a current to be sourced out of a first node N1 which, in turn, causes the voltage at the first node N1 to rise.
Similarly, when the voltage of input signal IN+ is less than the voltage of input signal IN-, the current output by transistor M12 is less than the current sunk by transistor M14. This difference in current causes a current to be sunk into the first node N1 which, in turn, causes the voltage at the first node N1 to fall.
When translator 10 is used to convert the differential signals output by a differential voltage controlled oscillator (VCO), such as a differential ring oscillator, into a single-ended oscillator signal, a number of problems arise. First, in order to meet the gain and speed requirements of the VCO, the size of transistors M11 and M12, along with the magnitude of the current source I, must be set to be relatively large because the transconductance of the differential pair is related to: ##EQU1## where g.sub.m is the transconductance, K is a constant, W is the channel width of the transistor, and L is the channel length of the transistor.
The problem with utilizing a relatively large W/L, however, is that the larger the W/L, the greater the input capacitance. When the increased input capacitance is combined with the impedance of the input signal source, a low-pass filter is effectively formed at the gate of transistor M12 which, in turn, limits the high frequency response of the translator differential input pair. This is the so called "Miller effect" which is well known in the art. Thus, if the differential input signals IN+ and IN- are driven by a low-impedance voltage source, the high frequency response of transistor M12 is largely unaffected.
However, if the differential input signals IN+ and IN- are driven by a high-impedance voltage source, such as a differential CMOS VCO, the high frequency response of the translator differential input pair is severely limited. This, in turn, badly distorts the duty cycle of the voltage signal at the first node N1, thereby requiring additional circuitry to form an oscillator signal with a 50% duty cycle.
On the other hand, if the gain of the translator is limited to reduce the signal distortion caused by the Miller effect, translator 10 may lack the gain to drive a gate connected to the first node N1. Thus, when the differential input signals IN+ and IN- get too small, translator 10 may have no output at all at node N1.
Therefore, there is a need for a differential-to-single ended translator that can generate an output signal with very small signal distortion and which can drive a subsequent gate.